The invention relates to a circuit arrangement for supplying a lamp, provided with
input terminals for connection to a supply voltage source,
a first circuit portion I for generating a current through the lamp from the supply voltage delivered by the supply voltage source,
a digital control loop controlling an operational parameter to a desired value, provided with
a sample circuit portion for sampling the actual value of the operational parameter with a predetermined frequency f, and
a control circuit portion for generating a control signal whose most recent value is Un, provided with an integrating circuit portion for augmenting Unxe2x88x921 with K*En, with Unxe2x88x921 being the most recent value but one of the control signal, En being the most recent value of an error signal which is a measure for the actual value of the operational parameter minus a desired value of the operational parameter, and K being a proportionality factor.
Such a control loop is called an integrating control loop. The operational parameter controlled by the digital control loop may be, for example, the lamp current or the power consumed by the lamp. It is desirable that the control loop should be stable at any ambient temperature, and also for any power consumed by the lamp if the circuit arrangement offers the user the possibility of adjusting the lamp power. To achieve that the control loop is stable at low values of the power consumed by the lamp, it is often necessary to choose the value of the proportionality factor K to be low. A disadvantage of such a low value of the proportionality factor K is, however, that the response of the control loop is slow, so that it takes a comparatively long time before a change in the desired value of the operational parameter will have achieved a corresponding change in the actual value of the operational parameter.
The invention has for its object to provide a circuit arrangement in which the control loop is stable and at the same time comparatively fast for widely varying values of parameters such as the ambient temperature the value of the power consumed by the lamp.
According to the invention, a circuit arrangement of the kind mentioned in the opening paragraph is for this purpose provided with
a second circuit portion II for influencing the value of the proportionality factor K, provided with
a memory for storing the most recent value En of the error signal and a most recent value but one Enxe2x88x921 of the error signal,
a comparator for determining the sign of each of the values of the error signal En and Enxe2x88x921,
a circuit portion III for increasing the proportionality factor K if the values En and Enxe2x88x921 have the same sign, and
a circuit portion IV for reducing the proportionality factor K if the values En and Enxe2x88x921 have unequal signs.
If two consecutive values of the error signal have opposite signs, this points to an unstable behavior of the control loop. The circuit portion IV in that case reduces the proportionality factor K. If two consecutive values of the error signal have the same sign, this suggests that the control loop is comparatively slow. The circuit portion III in that case increases the proportionality factor K.
The operation of the circuit portion III and the circuit portion IV adjusts the proportionality factor K to a value at which the control loop is stable and at the same time comparatively fast.
The invention may be applied with good results in a circuit arrangement with an integrating digital control loop, in other words a control loop in which the most recent value but one Unxe2x88x921 of the control signal is augmented with the term K*En at the predetermined frequency such that it is true that Un=Unxe2x88x921+K*En. Good results were also found for embodiments of a circuit arrangement according to the invention in which the control circuit portion augments the last value but one of the control signal Unxe2x88x921 not only with the term K*En but also with one or several other terms. More in particular, good results were obtained for embodiments of a circuit arrangement according to the invention provided with a proportional/integrating control loop, i.e. a control loop in which the control circuit portion is in addition provided with a proportional circuit portion for augmenting the most recent value but one of the control signal Unxe2x88x921 with P*(Enxe2x88x92Enxe2x88x921), in which P is a proportionality factor. It is true for such a control loop that Un=Unxe2x88x921+K*En+P*(Enxe2x88x92Enxe2x88x921). It was found to be advantageous in such embodiments to provide the circuit portion III in addition with means for increasing the proportionality factor P if the values of En and Enxe2x88x921 have the same sign, and to provide the circuit portion IV in addition with means for reducing the proportionality factor P if the values of En and Enxe2x88x921 have unequal signs.
It was found that a further stabilization of the digital control loop can be achieved in a circuit arrangement according to the invention in that the circuit portion III is provided with an activation circuit portion for activating the circuit portion III if an absolute value of the error signal, for example the absolute value of En or the absolute value of Enxe2x88x921, is greater than a preset value.
In a similar manner, a further stabilization of the digital control loop can be achieved in a circuit arrangement according to the invention in that the circuit portion IV is provided with an activation circuit portion for activating the circuit portion IV if an absolute value of the error signal, for example the absolute value of En or the absolute value of Enxe2x88x921, is greater than a preset value.
The circuit portion III of a circuit arrangement according to the invention may be constructed in a comparatively simple manner if the circuit portion III comprises means for multiplying one or more of the proportionality factors K and P by a predetermined value C1 greater than 1 if the values of En and Enxe2x88x921 have the same sign, and the circuit portion IV comprises means for multiplying one or more of the proportionality factors K and P by a predetermined value C2 smaller than 1 if the values of En and Enxe2x88x921 have unequal signs.
Since any instability of the control loop is to be quickly remedied whereas slowness of the control loop forms a less serious problem, the predetermined values C1 and C2 are chosen such that it is true that 1xe2x88x92C2 greater than C1xe2x88x921. It is achieved thereby that the circuit portion IV makes the proportionality factor smaller comparatively quickly in the case of instabilities, whereas the circuit portion III makes the proportionality factor K greater comparatively slowly in the case of a slow response. It was found that such a choice of the predetermined values C1 and C2 contributes to the stability of the control loop.
It was found to be advantageous to provide the circuit portion II with a microprocessor because a major portion of the functions of the circuit portion II can be carried out thereby in a comparatively simple and thus inexpensive manner.
An embodiment of the invention will now be explained in more detail with reference to a drawing.